EMRFD Message Archive 9270

Message Date From Subject
9270 2013-10-19 21:06:06 k6jq Unbuffered vs buffered CMOS inverters, with a twist
The recent thread about the 'W6QIF Oscillator' was interesting. It reminded me that
I realized I did not entirely understand why the unbuffered CMOS inverters ('HCU04,
'AHCU04) were superior to the conventional buffered ones ('HC04, 'AHC04), the W6QIF
article made use of a buffered 74HC04.

One a solderless breadboard, a single HC04 inverter with a 100k bias
resistor from input to output would happily oscillate around 51MHz.
This is because the HC04 is buffered, and consists internally of 3
CMOS stages, each one inverting. In other words, a single HC04
gate is actually a chain of 3 inverters. Connecting the output
to the input through the bias resistor creates a ring oscillator,
the frequency of which is 1 / (6 * inverter delay), which yields
about 3.2nS delay per stage, or a total of ~9.5nS for the single
inverter - consistent with the datasheet typical delay of ~9nS.

I don't have any HCU04s, but I do have a stock of AHCU04s.
Other than being faster, they should behave the same as an
HCU04. Replacing the HC04 with the AHCU04, I saw no
oscillation, but the gate self-biased to 1/2 Vdd as expected.

OK. So let's try the 74AHC04 I have. That ought to self-oscillate
at a seriously high frequency! Except it doesn't, and won't.
Because the input structure of the AHC family contains about
100mV of hysteresis, which prevents oscillation in this
circuit, as well as with any slow-transition input signal.

So there you have it - a darn good reason to use unbuffered
U04s in building an oscillator.

Note that the AHCU04 when built into a ring oscillator
of three inverters runs around 116MHz, suggesting a
per-inverter delay of ~1.4nS. AHC04 runs around 86MHz,
or 1.9nS/gate.

Dana  K6JQ


9276 2013-10-20 08:31:53 k6jq Re: Unbuffered vs buffered CMOS inverters, with a twist

Also, I recall the 74HC04 in a ring oscillator (three gates) runs at 37MHz, which suggests
about half the propagation delay that I'm seeing in a single-gate "ring". The explanation
I have for this is different load capacitance.

Dana K6JQ


9283 2013-10-22 17:17:36 Dana Myers Re: Unbuffered vs buffered CMOS inverters, with a twist
9284 2013-10-22 17:56:42 ehydra Re: Unbuffered vs buffered CMOS inverters, with a twist
How do you measure it? With a (loading!!) scope-probe or off-line via a
radio-receiver?

- Henry


Dana Myers schrieb:
>
9285 2013-10-22 18:42:37 Dana Myers Re: Unbuffered vs buffered CMOS inverters, with a twist
9286 2013-10-22 20:12:41 Ashhar Farhan Re: Unbuffered vs buffered CMOS inverters, with a twist
I have built vfos using the 74LS04 (not 74LS14). I have an unfinished
transceiver that uses these gates as rf amp. The gain was above 20 db.
The noise was low enough to bring up the atmosphereic noise on 14 mhz
quite loudly.
About seld-oscillations. If the termination is proper (I used a
cure-all 6 db pad in the outputs) the oscillations go away.
For the vfo I used a butler configuration with smd parts. It was one
of the most stable vfos in the lab. I found no particular reason for
the stability apart from that iuse of smd minimized low stability
wiring and use of the 1N4007 pair as tuning element must have overcome
the drift due to variable capacitor's expansion.
- farhan

On 10/23/13, Dana Myers <k6jq@comcast.net> wrote:
>
9287 2013-10-22 20:29:55 Dana Myers Re: Unbuffered vs buffered CMOS inverters, with a twist
14472 2018-01-04 17:55:46 vk3hn Re: Unbuffered vs buffered CMOS inverters, with a twist
Hi there,

I've been planning an HF + 6m superhet receiver build, along the lines of the EMRFD general purpose monoband receiver front end (Fig 6.68), and want to use a 74HC04 hex inverter (Fig 4.31) as an si5351 clock buffer (on each of the BFO and VFO), followed by pad and LPF, driving +7dbm DBM ADE-1 receive mixer and product detector.   All standard stuff.  

I'm interested in how high in frequency the 74HC04 will work reliably as a VFO squarer/buffer, as this determines the maximum VFO frequency and therefore the high/low side VFO frequency decision for higher bands.     

A quick search across this group trawled up a discussion from around 2008 and 2013 about 74HC04 as an oscillator, where people report it working up around 38MHz.  

Does this agree with other's experience of this IC when used as a buffer (not an oscillator)?

regards Paul VK3HN.  

14473 2018-01-05 04:42:06 Ashhar Farhan Re: Unbuffered vs buffered CMOS inverters, with a twist
why would you need a buffer after the si5351? it has ample drive for a diode mixer. 
- f

14474 2018-01-05 06:10:18 Tayloe, Dan (Noki... Re: Unbuffered vs buffered CMOS inverters, with a twist
I used this as a gated input squaring device for an audio output frequency counter as a club project, the Scqrpion Stinger Singer.   I recall that it worked ok to 80 or 90 MHz.  The AC version  was faster yet going  as high as 200 MHz in one case.  No prescaler device was used.

The PIC processor clock input was only rated to 50 MHz, but always seemed good to at least 75 MHz.  It was a special device that would read at 200 MHz.  I estimated the software to be good to over 400 MHz if the clock input of the 4 MHz PIC chip could handle it.

The clock went through a PIC internal prescaler counter, which in turn drove a counter register.  The secret to the high counting speed was to create a tight loop that only counted counter register overflows.  I.e., when the MSB of the counter register toggled from 1 to 0.  

The only down side was that when used in a linear mode as a squaring device with a 10K resistor from input to output, they would "free run" oscillate if there was no input.  Since that frequency was 70 to 90 MHz, it was not really a problem identifying when this was happening.

- Dan, N7VE

Sent from my Galaxy Tab® A


-------- Original message --------
14475 2018-01-05 08:22:42 Mike Nothdurft Re: Unbuffered vs buffered CMOS inverters, with a twist

And the SI5351 already has a square wave output.  It has rise and fall times of 1nS. The 74HC04 in worst case has rise and fall times in the double digits so it would only degrade the “squareness” of the SI5351.

Mike

K5ESS

 

 

14476 2018-01-05 08:43:27 Tayloe, Dan (Noki... Re: Unbuffered vs buffered CMOS inverters, with a twist

I could see using a “T” part such as an 74ACT04 to act as a level translator between the 3.3v out of the Si5351 and the 5v output.

 

  • Dan, N7VE

 

14477 2018-01-05 08:54:50 Nick Kennedy Re: Unbuffered vs buffered CMOS inverters, with a twist
I programmed my own PIC frequency counter and borrowed the gating circuitry from Dan Tayloe's Stinger Singer. I used a 74HC00 for gating. My SMT version would read up to 140 MHz and the DIP version a bit lower.

I used a 74AC74 flip-flop as the front end of a phasing receiver with a Tayloe detector, so the L.O. was at 4x frequency. I was able to get operation as high as 10 meters, so the chip was clocked at almost 120 MHz.

73-

Nick, WA5BDU



14478 2018-01-05 09:45:06 Mike Nothdurft Re: Unbuffered vs buffered CMOS inverters, with a twist

I’m surprised that the 74HC00 can do 120 MHz after looking at the datasheet specs for rise and fall times.  120 MHz has a period of 8.333nS which would imply a rise and fall time of 4.17nS or better; 4.17nS only giving a triangular waveform.  Given that the 74HC00 spec for rise and fall times is a guaranteed (max) limit I’m still surprised that you didn’t have to cherry pick your parts to achieve 120MHz.  But,  it’s hard to argue with success.

Mike

K5ESS

 

14479 2018-01-05 10:27:29 Tayloe, Dan (Noki... Re: Unbuffered vs buffered CMOS inverters, with a twist

The thing that I found when using the squaring circuit for the NC2030 DC receiver was the unexpected “clean up” of the LO that I got.  The sine wave from the mixer output is very clean, but still has noise components intermixed with this linearly changing signal.  Taking this signal and running it through a square wave limiting circuit like the 74AHC00 eliminates a great deal of that noise, limiting it mainly to a bit of jitter on the leading and trailing edge.

 

The end result was that high level signals out of the detection bandwidth caused much less “junk” to be produced in the received audio.  You cannot do anything about a dirty TX signal on the other end, but cleaning up the local LO via limiting seemed very useful.

 

  • Dan, N7VE

 

14480 2018-01-05 11:27:37 Tayloe, Dan (Noki... Re: Unbuffered vs buffered CMOS inverters, with a twist

I also found that the 74AHC family tended to create a more symmetrical square wave when used for squaring than other families if that is important.  For the frequency counter it did not matter, but for the receiver it did.

 

  • Dan, N7VE

 

14481 2018-01-05 11:57:22 Dana Myers Re: Unbuffered vs buffered CMOS inverters, with a twist
14482 2018-01-05 14:04:07 Bill Carver Re: Unbuffered vs buffered CMOS inverters, with a twist
All oscillators have noise, both phase noise and amplitude noise. I've seen some criticism of the Si5351 having slightly noisier output that, say the Si570.
If it (or any oscillator) has phase noise you have to live with it. If it has amplitude noise you can scrub that off by limiting/squaring its envelope. HOWEVER, casual squaring will transform amplitude noise into phase noise. Only when squaring is done precisely at the zero-crossing point of the waveform is there no/minimal amplitude-to-phase noise conversion.

I experimented with using an unbuffered inverter as a squaring device. Specifically, I was squaring a 100 MHz tone-modulated signal from an 8640B signal generator. I used a coupling capacitor to get RF to the inverter input, with a fixed resistor and multiturn potentiometer to adjust the DC bias on that input so the output transition occurred at the zero crossing point on the input waveform. At that voltage the even harmonic output dropped dramatically, and the tone sideband dropped to almost zero. In other words, it worked REALLY WELL to clean AM off the test signal.

I don't have any Si5351, but it would be interesting to square up one of its outputs with a really good squaring circuit to see if this produced a significantly cleaner output. It its output spurs are amplitude it might not only buffer the chip, but also clean it up a bit.

Bill  W7AAZ


14483 2018-01-05 14:47:05 Tayloe, Dan (Noki... Re: Unbuffered vs buffered CMOS inverters, with a twist

I was thinking the same thing about the Si5351A.  The nice thing about the squaring circuit is that it is off chip and can be run with an independent “clean” regular power source. 

 

I know the Si5351A has an independent supply pin for the buffer output, but being on the same chip it seems like it can help only so much in AM isolation from other junk (i.e., VCO/divider noise)  produced on the chip, even if it is a digital output.

 

  • Dan, N7VE

 

14484 2018-01-06 07:43:09 AD7ZU Re: Unbuffered vs buffered CMOS inverters, with a twist
A couple of related questions
I would like to use the Si5351B part,  8 available outputs and an external clock input 2 quadrature outputs for a rx, 2 for the tx, 1 for a codec. dont require a sin output

considering using an external tcxo vs xtal.  maybe that leads to some improvements? in both temp stability and noise?

the other question is the sensitivity to noise on the power rail.  the Si5351 data sheet describes internal power regulation which may make the use of a very low noise external regulator a moot point?  the tcxo devices ive seen need very clean power to perform at the spec

Randy
AD7ZU



14485 2018-01-06 08:11:32 Bill Carver Re: Unbuffered vs buffered CMOS inverters, with a twist
Yea....separate supply pin, but SHARED GROUND pin means the on-chip squaring circuit still has an inherent limitation. Altho they could have a separate wire bonds for the squaring ground and another for the chip. But I can attest to the performance improvement when you can fine-tune the squarer to the "zero crossing" of the incoming RF.
W7AAZ

14488 2018-01-07 21:09:14 vk3hn Re: Unbuffered vs buffered CMOS inverters, with a twist
Thanks everyone for your responses to my question about using 74AC04 inverters as a squarer/buffer on a si5351A clock output, used as a VFO across the HF range, for driving a +7dBm (ADE-1) DBM.   

Ashar Farhan asks why a buffer to get up to +7dBm is necessary at all.  That got me thinking.

I previously built a 160 to 17m receiver with an si5351A VFO and SA612 mixer (no clock buffering, just straight in to the Gilbert cell mixer). It worked well, but overall receiver gain dropped off at the higher end. That could be for a number of reasons. 

I went looking to see what others found about the consistency of the si5351A clock amplitude across the HF range.

KO7M  http://ko7m.blogspot.com.au/2015/05/si5351-clock-generator.html  reports the output voltage at 1 MHz is about 3V3 // At 30 MHz, the peak-to-peak drops to about 0V5 // Above 32 MHz the voltage level begins to rise again.  

Its hard to see how the si5351A could swing a clock to its supply rail (3.3v) but that aside, anything above 2v p-p  ought to be ample drive for an L7 mixer at 1MHz.  However, if is does drop to 0.5v at 30MHz, that's too low to drive the DBM.  

Christos SV1EIA     https://groups.io/g/QRPLabs/message/15524  uploaded spectrum and scope pics at the four output settings (2/4/6/8mA)  at 14MHz, showing:
2mA   2.63dBm
4mA   8.04dBm
8mA   10.48 dbm
16mA  11.79dBm

Based on these readings, the 4mA output setting should be close enough to drive the L7 DBM LO port at 14MHz. No indication of how these level change with frequency.   

So by inserting a 74AC04 stage I was trying to guarantee consistent amplitude at the SBL-1 LO port across HF range, to take the VFO signal amplitude out of the equation in a receiver that will operate 1.8 to 28MHz at a minimum.    

Did I miss something?  Maybe the devices being used in these tests are offering differing loads and that explains the different amplitude readings?

73 Paul VK3HN.  


 
14489 2018-01-07 21:53:15 Vince Vielhaber Re: Unbuffered vs buffered CMOS inverters, with a twist
We discussed the output of the Si5351 on the Bitx20 group. Here's a
copy/paste of the results of the test I ran:

----------------------------------------------------------------------
Current setup:
Tek 11402 Scope w/ 11A32 400MHz plugin
Tek P6121 10x probe - 1 meg termination in the scope
No bandwidth limiting

Adafruit si5351 board CLK2 terminated into 51 ohms.
Standalone Nano controlling it.
NOTE: CLK2 is also used for the following measurements.

There is a difference in output between 7.5MHz and 35.5MHz, but only
about 15mv rms.

There's a bit of ringing on the square wave but that's probably in my setup.

Ok, with the above setup, at 11.020 MHz:

2ma setting: 190 mv rms.
4ma setting: 380 mv rms.
6ma setting: 560 mv rms.
8ma setting: 735 mv rms.
----------------------------------------------------------------------

Vince.



14490 2018-01-07 22:59:03 Dana Myers Re: Unbuffered vs buffered CMOS inverters, with a twist
14494 2018-01-08 09:25:13 Vince Vielhaber Re: Unbuffered vs buffered CMOS inverters, with a twist
14495 2018-01-08 16:02:35 vk3hn Re: Unbuffered vs buffered CMOS inverters, with a twist
OK, thanks Dana and Vince for reporting/re-posting your measurements. On that basis,

- no need to worry about the si5351 clock amplitude changing significantly across the HF range 

- the 6mA setting will deliver the +7dBm more or less to the SBL1/ADE-1

- I can dispense with the 74AC00 buffer between si5351 clock and mixer.   

73 Paul VK3HN. 
14496 2018-01-08 22:35:23 QRP Labs Re: Unbuffered vs buffered CMOS inverters, with a twist
Hi all
 
 KO7M  http://ko7m.blogspot.com.au/ 2015/05/si5351-clock- generator.html http://ko7m.blogspot.com.au/ 2015/05/si5351-clock- generator.html  reports the output voltage at 1 MHz is about 3V3 // At 30 MHz, the peak-to-peak drops to about 0V5 // Above 32 MHz the voltage level begins to rise again.

 Its hard to see how the si5351A could swing a clock to its supply rail (3.3v) but that aside, anything above 2v p-p  ought to be ample drive for an L7 mixer at 1MHz.  However, if is does drop to 0.5v at 30MHz, that's too low to drive the DBM.

I think that this KO7M measurement must be wrong. Maybe 'scope probes issues or some other set-up issues, I don't know. Perhaps a bandwidth limitation of the 'scope he uses. The output of the Si5351A is a squarewave. He shows a sinewave at 12MHz! To be sure the waveform will look less and less square on a 'scope as the frequency increases - mostly due to limitations of the 'scope and probe. 

The output of the Si5351A is essentially flat as far as I have been able to determine, certainly across all HF. None of the QRP Labs kits would work properly otherwise!

I agree with Farhan, I think the Si5351A ought to be well capable of driving a diode mixer by itself. 

73 Hans G0UPL
14502 2018-01-09 18:42:17 bwbangerter Re: Unbuffered vs buffered CMOS inverters, with a twist
Does an unbuffered si5351 output present a 50ohm impedance to a mixer port?  And how could this be determined or verified?

Ben, K0IKR