EMRFD Message Archive 1652

Message Date From Subject
1652 2008-05-23 09:28:31 Kevin - M0KHZ Re: [SPAM] [emrfd] AD9912 DDS clock source – just a thought?
Weddig, Henning-Christof wrote:
> Kevin,
>
> i have a lot of (bad) experience with Hittite chips.
> In general ECL chips are limited in phase noise, the floor is about
> -150 dBc.
> I have also tried the HMC439 in a phase detector, not getting the
> result as I expected and the data sheet proposed!
>
> A better solution: use one (or two) AD9515 clock dsitribution chips
> from Analog devices having a phase noise floor of about -160dBc/Hz
> (division rate 10 each) for the programmable divider of the 1 GHz
> clock and a "normal phase frequency detector using the a 7474 type of
> D-FF.
> Even dividing 100 MHz down to 10 MHz You could use some of these fast
> Fairchild single gate D-FF´s 8and even for the PD)
>
> Henning
> DK5LV
>
> Kevin Wheatley schrieb:
>
>> ------------------------------------------------------------------------
>>
>> Betreff:
>> [emrfd] AD9912 DDS clock source – just a thought?
>> Von:
>> "Kevin Wheatley" <m0khz@tiscali.co.uk>
>> Datum:
>> Fri, 23 May 2008 08:32:25 -0000
>> An:
>> emrfd@yahoogroups.com
>>
>> An:
>> emrfd@yahoogroups.com
>>
>>
>> With the release of the AD9912 DDS there has been a surge of
>> interest for a good 1Ghz clock source.
>> Not fully understanding the issues, would the proposal below be
>> worth experimenting with?
>>
>> Crystek have recently introduced a new VCO – CVCO55CX-1000-1000, the
>> performance specs look
>> pretty good to me. If this was phase lock looped to a 10Mhz GPS,
>> would this be sufficient
>> as a clock for the AD9912.
>>
>> 10Mhz --- Phase det --- Diff Amp --- VCO -- Buffer Amp --- 1Ghz out
>>