Message	Date	From	Subject
15233	2019-02-01 23:28:12	Dana Myers	Observations about low-pass filters on CMOS-gate power amplifiers
On a bit of a lark, I recently built a WSPR transmitter using an ESP32 devboard + Si5351A module. It's a science fair project but feel free to have a look at: https://github.com/danak6jq/ESP32-WSPR At first, I just listened to it with a receiver and verified that it worked correctly, but, hey, let's connect an antenna. I tinkered with a few different configurations of CMOS gates in parallel, and am using a single 74ACT240 configured with one inverter buffering and level-shifting the Si5351A output and driving the other 7 inverters in parallel. I had some data I thought I'd share. It's longish. Side note: 74AC-series is spec'ed for +/-24mA per output, 3x the +/-8mA of the AHC-series. You'll see a lot of circuits that run the '240 at 8V to increase power output and require a heatsink... don't do that until you read the rest of this post. Initially, I naively stuck the usual Pi low-pass filter on the PA output. Power output and efficiency were not great - I can see why people jack the power supply up, even if that's several kinds of horrible to the part. Then I thought about it; the output of the PA is a square-wave (well, square-ish, as these things comes) with fairly sharp transition times. It occurred to me that the instantaneous frequency content of the transition is rich in harmonics, and the input of the Pi network looks like a large capacitor to this. You can find plenty of design documentation on what large load capacitance does to the operation of CMOS; specifically, it results in short, large current spikes through the gate output - one transition will have a large spike from Vcc as it charges the output capacitance, the next transition will have a large spike to ground as it discharges that. Not very much of that charge gets transferred through the low-pass filter to the load. I put a 1ohm resistor in series with the '240 Vcc lead (with ample decoupling directly from the Vcc lead to ground). This allows me to probe the current to the part during operation. The '240 is operating at 5V, of course. So I compared equivalent Pi and T low-pass networks on my prototype. Operating at 14.0074122MHz, with a carbon 51-ohm dummy load, I saw: Filter Pout Pin Efficieny Pi network: 36mW 135mW 26.7% T network: 119mW 200mW 59.5% Well, that's pretty substantial right there. However, remember the '240 draws power internally when switching, and one of the inverters is being used to drive the other inverters, that's using power in the input capacitance. So I pulled the output DC block capacitor out, thus leaving the PA output completely unloaded, and measured ~64mW power consumption. Revising the efficiency numbers to exclude the 'fixed' power use of the '240 gives the 'RF efficiency': Filter Pout Pin* Efficieny* Pi network: 36mW 71mW 50.7% T network: 119mW 136mW 87.5% This should be very compelling evidence to avoid a "shunt input" matching network at the output of a CMOS gate PA; I expect this is also true even when using a broadband matching transformer. Also observed: Pout of 119mW in 50 ohms is 2.44Vrms sinusoid, or ~6.9Vp-p, a much larger output swing than from the CMOS output. As a square wave, 119mW is ~4.88Vp-p, which is very close to the expected output swing of the CMOS output (there's ~40mV drop across the 1-ohm Vcc resistor, the rest of the difference is surely the result of the '240 output resistance). So the T low-pass network is doing a pretty good job of power conversion here. The '240 runs cool as a cucumber. All of the above was done with an SN74AHCT240. After switching to an SN74ACT240, I did not repeat the above measurements, but I see the same power output with same T network. For amusement sake, I designed a T network with a source impedance of 10 ohms and 50 ohm load, being reasonably careful to trim the inductor values with an LCR meter. With this circuit, I see Pout of ~290mW, or 3.8Vrms sinusoid across 50 ohms; that's ~10.7Vp-p - remember the CMOS power rail is slightly less than 5V. 290mW is ~1.7Vrms in a 10-ohm load, or about 3.4Vp-p as a square-ish wave. If I've done the math correctly, I think this loads each inverter at ~24mA rms (with the peaks being 1.4x greater); reading the datasheet suggests 3.4Vp-p is about what I should expect with this load. I'm running the chip at 5V and it's not warming-up that I notice. All inductors are wound on T37-6 cores, capacitors are vintage silver-mica. Main moral of the story: CMOS inverters can make a very decent QRPp PA, with good efficiency - if you use T (series input) low-pass networks for matching/filtering. Avoid Pi (shunt input) for this application. 73, Dana K6JQ P.S. Given the relatively low output resistance of the CMOS PA, I doubt the Pi network is performing nearly as well as the T as an LPF.
15234	2019-02-02 05:55:39	Harold Smith	Re: Observations about low-pass filters on CMOS-gate power amplifier
Very useful information. Thank you. de KE6TI, Harold
15235	2019-02-02 10:45:29	Dana Myers	Re: Observations about low-pass filters on CMOS-gate power amplifier

On a bit of a lark, I recently built a WSPR transmitter using an
ESP32 devboard + Si5351A module. It's a science fair project but
feel free to have a look at:

    https://github.com/danak6jq/ESP32-WSPR

At first, I just listened to it with a receiver and verified that
it worked correctly, but, hey, let's connect an antenna. I tinkered
with a few different configurations of CMOS gates in parallel, and
am using a single 74ACT240 configured with one inverter buffering
and level-shifting the Si5351A output and driving the other 7 inverters
in parallel.

I had some data I thought I'd share. It's longish.

Side note: 74AC-series is spec'ed for +/-24mA per output, 3x the
+/-8mA of the AHC-series. You'll see a lot of circuits that run the
'240 at 8V to increase power output and require a heatsink... don't
do that until you read the rest of this post.

Initially, I naively stuck the usual Pi low-pass filter on the PA
output. Power output and efficiency were not great - I can see why
people jack the power supply up, even if that's several kinds of
horrible to the part.

Then I thought about it; the output of the PA is a square-wave (well,
square-ish, as these things comes) with fairly sharp transition times.
It occurred to me that the instantaneous frequency content of the
transition is rich in harmonics, and the input of the Pi network
looks like a large capacitor to this. You can find plenty of design
documentation on what large load capacitance does to the operation
of CMOS; specifically, it results in short, large current spikes
through the gate output - one transition will have a large spike
from Vcc as it charges the output capacitance, the next transition
will have a large spike to ground as it discharges that. Not very
much of that charge gets transferred through the low-pass filter
to the load.

I put a 1ohm resistor in series with the '240 Vcc lead (with ample
decoupling directly from the Vcc lead to ground). This allows me to
probe the current to the part during operation. The '240 is operating
at 5V, of course.

So I compared equivalent Pi and T low-pass networks on my prototype.
Operating at 14.0074122MHz, with a carbon 51-ohm dummy load, I saw:

Filter        Pout     Pin    Efficieny
Pi network:    36mW    135mW    26.7%
T network:   119mW    200mW    59.5%

Well, that's pretty substantial right there. However, remember
the '240 draws power internally when switching, and one of the
inverters is being used to drive the other inverters, that's
using power in the input capacitance. So I pulled the output
DC block capacitor out, thus leaving the PA output completely
unloaded, and measured ~64mW power consumption.

Revising the efficiency numbers to exclude the 'fixed' power
use of the '240 gives the 'RF efficiency':

Filter        Pout     Pin*    Efficieny*
Pi network:    36mW    71mW     50.7%
T network:   119mW   136mW     87.5%

This should be very compelling evidence to avoid
a "shunt input" matching network at the output of a
CMOS gate PA; I expect this is also true even when
using a broadband matching transformer.

Also observed: Pout of 119mW in 50 ohms is 2.44Vrms
sinusoid, or ~6.9Vp-p, a much larger output swing than
from the CMOS output. As a square wave, 119mW is ~4.88Vp-p,
which is very close to the expected output swing of the
CMOS output (there's ~40mV drop across the 1-ohm Vcc resistor,
the rest of the difference is surely the result of the '240
output resistance). So the T low-pass network is doing a
pretty good job of power conversion here. The '240 runs
cool as a cucumber. All of the above was done with an
SN74AHCT240.

After switching to an SN74ACT240, I did not repeat the
above measurements, but I see the same power output with
same T network. For amusement sake, I designed a T network
with a source impedance of 10 ohms and 50 ohm load, being
reasonably careful to trim the inductor values with an LCR
meter.

With this circuit, I see Pout of ~290mW, or 3.8Vrms sinusoid
across 50 ohms; that's ~10.7Vp-p - remember the CMOS power rail
is slightly less than 5V. 290mW is ~1.7Vrms in a 10-ohm load,
or about 3.4Vp-p as a square-ish wave. If I've done the math
correctly, I think this loads each inverter at ~24mA rms (with
the peaks being 1.4x greater); reading the datasheet suggests
3.4Vp-p is about what I should expect with this load.

I'm running the chip at 5V and it's not warming-up that I notice.
All inductors are wound on T37-6 cores, capacitors are vintage
silver-mica.

Main moral of the story: CMOS inverters can make a very decent
QRPp PA, with good efficiency - if you use T (series input)
low-pass networks for matching/filtering. Avoid Pi (shunt
input) for this application.

73,
Dana K6JQ
P.S. Given the relatively low output resistance of
the CMOS PA, I doubt the Pi network is performing
nearly as well as the T as an LPF.