EMRFD Message Archive 1044
Message Date From Subject 1044 2007-09-19 17:50:19 bkopski MOSFET PA Bias Stabilization Circuit I have posted in Photos and in Files some pix and a pdf respectively
of an experimental 20M MOSFET PA / bias circuit that is proving to be
thermally super-stable. It is actually intended for use with a BITX
project - there is a BITX Group on Yahoo. However, at the
encouragement of Wes, W7ZOI and Bob, N7FKI I'm sharing the info with
the EMRFD group.
I've been playing with a HB class AB PA for many months and only
recently have enjoyed some achievement. One part of that is the
posted circuit approach to stabilizing the FET bias over
temperature. Normally, FET bias is adjusted at ambient temperature
for some static current flow and the exact number seems to vary with
individual preference but generally seems to be mostly in the 10's of
mA area. Then during periods of signal drive - especially CW drive -
FET temperature can soar and upon removal of signal the quiescent
current may actually have climbed to 100's of mA - and take "forever"
to restabilize at the initial value. At least, this has been my
To address this matter I experimented with the subject circuit and
have found remarkable success with the performance. Basically, I can
establish about 150m mA total quiescent for my push pull pair, then
run it up to over +43 dBmCW output for a sustained period of time
during which the heat sinks become untouchable, remove drive, and in
SECONDS the quiescent current reverts to very near the original value.
Referring to the circuit, the FET bias is derived from a voltage
source consisting of series connected adjustable stable part and a
temperature dependent part. The adjustable ("programmable") part is
provided by the TS3431 1.24 volt reference and is controlled with the
1K trimmer shown there. Added to this adjusted stable voltage value
is a temperature dependent component resulting from the series
connection of 4 diodes. In my case, these are epoxied in pairs on
each of the two FET-associated heat sinks. The series string of
diodes and programmed reference voltage thus forms a "higher" total
voltage with a negative temperatue coefficient. All that remains is
to apply a determinable portion of this total voltage to the FET
gates via the associated trimmable dividers.
I was able to "tune" everything up in very few tries. First, for
some arbitrary ("starter") setting of the TS3431 voltage value, I
adjusted the gate voltages for a nominal total drain current at room
temperature. In my case this was about 150 mA total for the pair -
roughly 75 mA for each FET. I then ran the PA full bore at about +43
dBm output (about 2.8 amps total input at 12.0 volts Vdd) for
several minutes to get the sinks hot. Upon removal of drive, I
watched the current settle back. My first try was somewhat a "miss" -
the total drain current loitered a bit too long at too high a value.
To address this, I lowered the TS3431 voltage and readjusted the gate
bias trimmers for the desired room temperature drain current. This
made the total bias system supply more temperature dependent, ie,
less stable. The second run resulted is MUCH improved behavior - the
quiescent current actually dropped BELOW the room value very quickly
upon removal of drive. In other words, I "overshot" the corrective
A third shot at this (slightly raising the stable voltage part)
resulted in nearly perfect results - for the same experiment getting
the sinks quite hot, upon drive removalof drive the quiescent current
dropped to almost exactly the room condition - IN SECONDS - too fast
to actually measure in time!
Obviously an exact "tune up" will be dependent on the MOSFETS used.
The values shown herein are only intended as examples resulting from
my particular assembly (which uses STP16NF06 MOSFETS). I don't see
any way to do this other than by experimental adjustment - but this
has proved to be very easy to do.
While I've not tried it, I have no reason to believe the same
technique would not work for a single ended AB PA stage as well.
BTW - while the "tune up" makes use of "no power" and "full power"
conditions, the resulting behavior works just great for "any power"
in between. I've not been able to find ANY operational condition for
my PA breadboard for which the original quiescent current condition
is not attained FAST.
Here's hoping this circuit technique proves useful for others.
Cordially and 73,
1048 2007-09-20 08:45:00 John Marshall Re: MOSFET PA Bias Stabilization Circuit Bob,
Thanks for a great report on an excellent piece of experimental work.
Just a couple of comments (and a lot of snippage)...
1049 2007-09-20 18:19:04 Mike Brainard Re: MOSFET PA Bias Stabilization Circuit 1050 2007-09-21 05:39:46 Allison Parent Re: MOSFET PA Bias Stabilization Circuit