EMRFD Message Archive 3891

Message Date From Subject
3891 2009-12-22 08:22:32 chrisethompson Clock, hum and woe
I'm packaging a T2 and R2 into a 40m transceiver and have some issues with the digital dial I am using. Any suggestions to remove the clock noise would be most welcome. The dial uses a lumex display and a PIC. I have sealed it in a box made from pcb material and shielded the audio cables in the receiver, but the clock noise is still there. It's much less, but still audible.

To make matters stranger, it is much worse when I run the rig from my PSU (rather than a battery). The PSU introduces quite a bit of hum, but it also dramatically increases the clock noise from the counter.

I'm confused why that happens...

The counter is connected just after the VFO buffer. The VFO is first fed into a 50ohm splitter and the counter is connected to the TX side of the splitter through a 10pF cap and a 2.2k resistor.

Any ideas much appreciated.

Chris
w2/g0kla
3893 2009-12-22 08:39:17 Niels A. Moseley Re: Clock, hum and woe
On 22-Dec-09 17:20, chrisethompson wrote:
> I'm packaging a T2 and R2 into a 40m transceiver and have some issues with the digital dial I am using. Any suggestions to remove the clock noise would be most welcome. The dial uses a lumex display and a PIC. I have sealed it in a box made from pcb material and shielded the audio cables in the receiver, but the clock noise is still there. It's much less, but still audible.
>
> To make matters stranger, it is much worse when I run the rig from my PSU (rather than a battery). The PSU introduces quite a bit of hum, but it also dramatically increases the clock noise from the counter.
>
> I'm confused why that happens...
>
> The counter is connected just after the VFO buffer. The VFO is first fed into a 50ohm splitter and the counter is connected to the TX side of the splitter through a 10pF cap and a 2.2k resistor.
>
> Any ideas much appreciated.
>
> Chris
> w2/g0kla
>

Hi Chris,

Have you sufficiently bypassed the supply going to the counter?
If not, I suggest using a feedthrough capacitor and an RF choke on the
supply rail going into your PCB enclosure.

Is the digital noise still there when you disconnect the counter's RF
input but keep the supply connected?

73,
Niels PA1DSP.
3896 2009-12-22 09:14:36 Neil Douglas Re: Clock, hum and woe
Chris,



The output impedance of the battery will be much lower than your PSU. The
noisy current from your digital dial will generate a voltage across this
impedance which will be 'modulated' onto the supply voltage to your
sensitive RF modules. Lower impedance - lower noise voltage.



It helps if you can star connect each module to the power source, wiring
them series daisy chain fashion will result in any noise on the counter
supply modulating the supply to the RF modules.



Do you have any idea which frequency is getting into the RF modules - the
digital dial master clock oscillator, the display multiplex frequency or the
frequency counter sampling gate drive?



NeilD

G4SHJ







_____

3898 2009-12-22 11:33:31 ajparent1 Re: Clock, hum and woe
I used an older KD1JV display unit and had the same problem.

Solution was a isolation transfromer for the RF input 1:1 to avoid a ground for the coax sample point. I wanted only one DC ground point. Also a 1000uf cap directly across the boards DC input and the power and ground source (12v) I had to try various points
3904 2009-12-22 18:57:53 Ashhar Farhan Re: Clock, hum and woe
1. What kind of isolating circuit are you using between the pic input
and the vfo output? Does disconnecting the vfo from the counter make
it quiter?
2. The shielding can be counter productive if it starts to radiate!
The quitest counter in my shack was built over a pref board. It sits
in th open chassis.

Your first diagnosis should be to isolate where the noise is getting
into the signal chain. It looks like power line radiation to me.

The R2 will be particularly sensitive to common mode noise. Have you
considered putting the counter and the vfo together in the same
sheilded box?

- farhan

On 12/23/09, ajparent1 <kb1gmx@arrl.net> wrote:
> I used an older KD1JV display unit and had the same problem.
>
> Solution was a isolation transfromer for the RF input 1:1 to avoid a ground
> for the coax sample point. I wanted only one DC ground point. Also a 1000uf
> cap directly across the boards DC input and the power and ground source
> (12v) I had to try various points
3911 2009-12-23 14:33:25 chrisethompson Re: Clock, hum and woe
I'm not using feedthrough capacitors (bc I dont have any in the junk box) but I have bypassed the supply. I can add a 1mH RFC.

Yes, the noise disappears when the RF input is disconnected.

Chris

3912 2009-12-23 14:45:22 chrisethompson Re: Clock, hum and woe
I have tried several isolation circuits, though not the isolation transformer that Allison suggested. I tried a common base amplifier, hoping for reverse isolation of the clock signals. I tried a high impedance FET amplifier, wandering if the counter was "pulling" the VFO and effectively modulating the RF with the sample rate interval. Neither made a difference, so I suspected it is a shielding issue.

I have the counter and the R2 in the same shielded box already. The VFO is in a further internal box and the counter is in a PCB box, except for the display, which needs to be visible...

I'm going to try some further decoupling and grounding.

Chris
w2/g0kla

3913 2009-12-23 14:48:23 Niels A. Moseley Re: Clock, hum and woe
On 23-Dec-09 23:33, chrisethompson wrote:
> I'm not using feedthrough capacitors (bc I dont have any in the junk box) but I have bypassed the supply. I can add a 1mH RFC.
>
> Yes, the noise disappears when the RF input is disconnected.
>
> Chris

In many PIC-based frequency counters, signal gating is done by forcing
the incoming RF signal to +5V or GND using a pin on the PIC. This
clamping can generate quite some noise on the RF input, especially if
the RF input buffer provides poor/no isolation.

Adding a inverter (74HC04) between the input RF amplifier and the PIC
should improve the isolation significantly, if the above is the cause of
your noise problem.

73,
Niels PA1DSP
3914 2009-12-23 15:03:15 chrisethompson Re: Clock, hum and woe
The input to the counter is through the phase comparator of a 74HC4046, so it's not aggressively pulled to Vcc or ground I think.

Chris
w2/g0kla

3915 2009-12-23 16:09:47 ajparent1 Re: Clock, hum and woe
Ok,

In mine the coulter is in it's own box, VFO in another and the MiniR2
in a seperate box with the T2. All that is in a bigger box. Lots of shielding.

Also the counter samples RF and amplifies it enough to drive logic at 5V. IF the counter is not shielded the RF gets out and you have the classic DC reciever problem of hearing it's own reflected and modulated RF (LO) aka tuneable hum.

Does it do that with a dummy load at the antenna?

Does disconnecting the counter cable from the VFO clean it up?

Does removing the power to the counter clean it up?

The answers to those may help you zero in
3936 2009-12-30 18:13:37 chrisethompson Re: Clock, hum and woe
I fixed this to my satisfaction.

I've decoupled the supplies to the counter just as they enter the PCB box. I also made sure that the PCB box was really well sealed. That seems to have pushed the clock noise down below the usual 40m noise level.

I think I've confirmed that the problem was leakage of the clock signal from the counter. I can easily get the noise back by putting my hand right by the display. The allows enough leakage to be audible again.

thanks everyone for the advice.

Chris
w2/g0kla

4010 2010-01-18 14:48:59 Johan H. Bodin Re: Clock, hum and woe
I had a similar problem many years ago with a PIC based frequency
counter in a simple 80m DC receiver. There was a violent buzz which was
totally independent of VFO tuning. Instead of using the "standard"
method of using a low value series resistor and force the signal to
either GND or +5V with the PIC pin, I used an external gate, 74HC00 I
think. This did not help at all. I realized that the gating of the
signal (10ms pulses for 100Hz counter resolution) was nothing but a
squarewave AM modulator producing ugly sidebands around the VFO
frequency... Careful VFO buffering did not help as the buzz sidebands
were generated in the counter gating process and were somehow radiated
back into the receiver's input.

I solved the problem by adding a "counter downconverter" consisting of
an NE612 with 2MHz crystal, a PNP transistor and a low-Q resonant
circuit to select the 1.5 to 1.6MHz output (the VFO was tuning 3.5 to
3.6MHz). The PIC program was changed to add 2 to the MHz digit. Buzz gone!

So, I ended up with a zero IF receiver with a 1.55MHz IF dial :-)

73
Johan SM6LKM


Niels A. Moseley wrote:
> In many PIC-based frequency counters, signal gating is done by forcing
> the incoming RF signal to +5V or GND using a pin on the PIC. This
> clamping can generate quite some noise on the RF input, especially if
> the RF input buffer provides poor/no isolation.
>
> Adding a inverter (74HC04) between the input RF amplifier and the PIC
> should improve the isolation significantly, if the above is the cause of
> your noise problem.