EMRFD Message Archive 13727
Message Date From Subject 13727 2017-03-22 07:38:59 Hans Summers QRP Labs VFO/SigGen now has quadrature output mode Hi all
The new firmware version of the $33 kit, the Si5351A synthesized VFO/SigGen
kit http://qrp-labs.com/vfo now includes a quadrature output mode. In this
mode the Clk0 and Clk1 outputs are on the same frequency but are offset by
a fixed phase shift. Choices of phase shift are 0, 90, 180 and 270 degrees.
The quadrature modes are the 90 and 270 degree options.
When driving a Quadrature Sampling Detector (a.k.a. Tayloe detector) the
two inputs can drive the typical FST3253 switch directly, without requiring
a divide-by-4 circuit (e.g. 74AC74). Switching between Upper and Lower
sidebands is a matter of changing the menu configuration from 90 degrees to
The VFO/SigGen can operate down to a minimum frequency of 3.5kHz (kiloHz).
But the Quadrature mode can only operate over the frequency range approx
3.2MHz up to the maximum 200MHz output frequency limit of the Si5351A
Synth. This is a limitation of the Si5351A synthesizer chip.
The Si5351A Clk0/Clk1 quadrature output mode was tested in a 40m CW
transceiver (7MHz) with Quadrature Sampling Detector. It was compared to a
4x LO frequency with 74AC74 divide-by-4 circuit. The attached graph shows
the unwanted sideband suppression. The RED line is the Clk0/Clk1 quadrature
and the BLUE line is using the 74AC74 divider. The unwanted sideband
suppression was a little better with the Si5351A than the 74AC74. The same
measurement was repeated in a 20m CW transceiver (14MHz) with the same
result. Measurements at higher frequencies are pending.
73 Hans G0UPL
[Non-text portions of this message have been removed]
13728 2017-03-22 08:36:48 Alberto I2PHD Re: QRP Labs VFO/SigGen now has quadrature output mode 13729 2017-03-22 08:49:27 Dale Hammer Re: QRP Labs VFO/SigGen now has quadrature output mode
Looks like Hans has the graph on his website at:
under the “Kit photos” section.
13730 2017-03-22 11:49:28 Alberto I2PHD Re: QRP Labs VFO/SigGen now has quadrature output mode 13731 2017-03-22 20:21:23 AD7ZU Re: QRP Labs VFO/SigGen now has quadrature output mode interesting results, but...reviewing the Si5351 data sheet I note the output phase offset parameter and assume that function was used to create the quadrature output.The the output phase offset parameter resolution is 333ps.That is a coarse adjustment ~ 3.6 deg @ 30mhz or 1.7 deg @ 14mhzThe graph is the baseband opposite sideband rejection.The error could be due to not only the quadrature LO but phase and amplitude errors within detectors/mixers + analog phase shift network???was additional phase compensati 13735 2017-03-24 00:36:02 Hans Summers Re: QRP Labs VFO/SigGen now has quadrature output mode Hi Randyinteresting results, but...
reviewing the Si5351 data sheet I note the output phase offset parameter and assume that function was used to create the quadrature output.The the output phase offset parameter resolution is 333ps.That is a coarse adjustment ~ 3.6 deg @ 30mhz or 1.7 deg @ 14mhz
The graph is the baseband opposite sideband rejection.The error could be due to not only the quadrature LO but phase and amplitude errors within detectors/mixers + analog phase shift network???was additional phase compensation used in the receiver?Yes I understand your concern. Yes, the output phase offset configuration register is used to create the quadrature output. However, I think that the situation is not so bad as you suggest ;-)According to SiLabs App Note AN619 at page 57:Clock 0 Initial Phase Offset.CLK0_PHOFF[6:0] is an unsigned integer with one LSB equivalent to a time delay ofTvco/4, where Tvco is the period of the VCO/PLL associated with this output.So you can specify an integer from 0..127 which is the number of quarter-periods of the internal VCO. According to the SiLabs documentation the configuration should be such that the internal VCO runs at 600-900MHz. (Actually everything works fine well outside of this range, in practice). If you take the mid-range VCO frequency of 750MHz, and calculate the duration of 1/4 of its period, by magic you get 333ps. This exactly matches the PSTEP "Output Phase Offset" specification of 333ps/step in the AC Characteristics table on page 5 of the Si5351A datasheet. But note that this specifcation is "Typ" with no "Min" and "Max" specification.The SiLabs documentation is notoriously poor compared to other manufacturers. But taking all together, it is reasonable to deduce that their "Typ" PSTEP specification of 333ns is indeed just what a 1/4 VCO cycle would be at the typical mid-range VCO frequency of 750MHz.The VCO frequency is divided by the MultiSynth dividers. The SiLabs documentation recommends the use of an even integer divisor for the MutliSynth for best (minimum) jitter performance. In order to obtain 90-degree phase, all that is required is to set the Phase Offset register to exactly the same value as the [even integer] MultiSynth divider.There is no approximation involved. If it is true that the phase offset register specifiies offset in a number of VCO quarter-cycles, and if the register is set to the same value as the even integer MultiSynth divider, then the output will be precisely 90 degrees at ANY frequency, from the minimum (determined by having MultiSynth divider at 126) up to the 200MHz maximum output of the Si5351A Synth chip. That is, the 90-degree phase relationship should hold precisely, over the range 3.2 to 200MHz. This is what is implemented in the QRP Labs VFO/SigGen http://qrp-labs.com/vfo in the quadrature output mode.In the more general case where you may happen to want an arbitrary phase offset, then I agree that there would be accuracy constraints based on the limited resolution of the phase offset register. But not when you want an exact 90-degree offset. Theoretically it should be absolutely exact!Nothing in the real world is as perfect - it will depend in practice on how good the "1/4-cycle" offset really is, and how that depends on frequency, etc. I observed the Clk0 and Clk1 on a 'scope and the phase offset "looked" fine, up to 50MHz or so where I would anyway start to doubt the matching of the 'scope probes and 'scope channels etc. But of course "looked OK" means almost nothing. I do not have equipment to precisely measure phase offset but a friend of mine will be making the measurement soon. My only way to measure it was in a phasing method direct conversion receiver. You are right that there is an audio phase shift network, which has both phase adjustment and amplitude adjustment. It's the best I could do at the time. So I'm waiting on the more direct phase offset measurements. But for now, according to a reasonable interpretation of the Si5351A datasheet and AN619, the quadrature LO should be very accurate.73 Hans G0UPL
13736 2017-03-24 09:58:53 AD7ZU Re: QRP Labs VFO/SigGen now has quadrature output mode Hans,Thanks for the explanation and clarification, I agree that the SiLabs documentation omits a lot of detail. I have some experience with the Si570 and am considering the Si5351 to lower power consumption and eliminate 2 d-flops used to create a quadrature clock.following your explanation the phase offset parameter might also be used to compensate phase errors introduced in the mixers/detectors?? I had not read the Si5351 app notes just the data sheet.RandyAD7ZU