EMRFD Message Archive 13045

Message Date From Subject
13045 2016-08-08 15:51:12 kerrypwr Output Impedance Of Si570 (CMOS Version)

Does anyone know the output impedance of this device?


Searching produces rather different figures; one experienced experimenter has measured it as 12 ohms whilst other sources, including kit suppliers, mention 200 ohms.


Note that my enquiry concerns the CMOS version of the IC.


Thanks.


Kerry VK2TIL.

13046 2016-08-08 16:10:53 Dana Myers Re: Output Impedance Of Si570 (CMOS Version)
13047 2016-08-08 16:36:29 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Thanks Dana.

These are the two references I mentioned previously;

https://s9.postimg.org/akttgqn1b/12_Ohms.gif

https://s10.postimg.org/r4gady989/200_Ohms.gif

There are a few others but the authors of these seem to be well-versed technically.

In either case a 4:1 transformer should achieve 50 ohms; connecting it is the conundrum!  :)

I can experiment once I start building but I'd like some advance knowledge if possible.

Kerry VK2TIL.

 




 

13048 2016-08-08 16:47:57 Clint ] Re: Output Impedance Of Si570 (CMOS Version)
Even with the 4:1 transformer bringing the load down to 50 ohms, there will be some reactance at some frequencies.  I have found that adding a MCL GALI amp in the output is a big help in driving receiver double balanced mixers.  This was in spite of the fact that the raw 570 output had enough LO power for the mixer.  I used a GALI-6 amp with about 6 db of pad on the input.  With that combo, the number of birdies in the receiver were greatly reduced.

73
Clint
W7KEC

Sent from my iPad

13049 2016-08-08 17:08:49 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Thanks Clint.

I may well do the same thing; add an amplifier.

I've done this previously, using both MMICs and discrete (2N5109) amplifiers.

But it's the output impedance of the Si570 that I'm curious about at this point.

Kerry VK2TIL.
13050 2016-08-08 19:42:06 Ken Chase Re: Output Impedance Of Si570 (CMOS Version)
Kerry

I used this link to measure the o/p impedance of my SI570. I measure it over a year ago and I don't recall what I measured.


73

Ken VA3ABN

13051 2016-08-08 19:42:37 Ken Chase Re: Output Impedance Of Si570 (CMOS Version)
Kerry

I used this link to measure the o/p impedance of my SI570. I measure it over a year ago and I don't recall what I measured.


73

Ken VA3ABN

13052 2016-08-08 19:53:17 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Thanks Ken.

That is where the figure of 12 ohms came from; the first of my links in my earlier post is an extract from that article.

I will use that or another method if I must but I was just wondering why there seems to be a divergence of views on the impedance; each kit supplier or home-builder seems to have a different view of the output Z and a different way of obtaining a 50-ohm output impedance.

Kerry VK2TIL.
13053 2016-08-08 20:39:35 Will Kimber Re: Output Impedance Of Si570 (CMOS Version)
Hi Folks,

Just a stab in the dark but does it depend on the type of output your
Si570 has? Cmos, lvds, singlended or push-pull & etc.

Cheers,
Will

13054 2016-08-08 20:43:26 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
G'day Will.

Yes, it does; have a look at the data sheet.

That's why I specified CMOS in my question.

I will end-up measuring it in accordance with the EMRFD philosophy.  :)

Kerry VK2TIL.
13055 2016-08-08 21:24:16 Dana Myers Re: Output Impedance Of Si570 (CMOS Version)
13056 2016-08-08 22:23:58 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Thanks Dana; in the spirit of EMRFD, one measurement is worth a thousand guesses!

That is pretty close to the 12-ohms that AA0ZZ measured.

A 4:1 transformer should match that into 50 ohms.

Kerry VK2TIL.
13057 2016-08-08 22:57:14 Ashhar Farhan Re: Output Impedance Of Si570 (CMOS Version)
The CMOS vesion is definitely not 12 ohms. It gives 3.3v peak. At 12 ohms, that would be 100mw of power! (1.6x1.6/24). This seems to be a implausible. The CMOS version can source 20 ma. At 1.6/0.02, that would put it at 32 ohms. 

Using a transformer to drive a diode mixer if fraught with issues. To begin with, the termination is not strong. Second, the driving power is too much it can horribly upset the diode mixer's balance. A better way is to use a pad. You can always design a pad with 32 ohms on one side and 50 ohms to the other, with 6db attenuation.

- f

13058 2016-08-09 00:03:43 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Thanks Farhan; that somewhat adds to the mystery!

1.6/0.02 = 80.

The data sheet, as I understand it, says that the output voltage is between 0.8x & 1x Vdd (3.3v); I guess that this means about 3v peak for the output square wave.  I also guess that this is "open-circuit" voltage.

The data sheet also says that the output can provide 32mA; 1.5/0.032 = 47.

This and other information is the source of my confusion; exactly what is the output impedance of this device?

The measurements done by Dana and by AA0ZZ agree and were done as you would if you wanted the output impedance of a device modelled as a voltage source with a series resistor; I did just this recently to find the output impedance of a function generator, using the "half-voltage" principle.

I'm OK with the methods of driving a mixer; the question was Does anyone know the output impedance of this device?

Kerry VK2TIL.

13059 2016-08-09 00:09:16 Ashhar Farhan Re: Output Impedance Of Si570 (CMOS Version)
I did do a measurement through an RLB. It is buried in my lab notes. i will pull it out and mail it by tomorrow or just measure them all over again.

- f

13064 2016-08-09 07:22:50 Dana Myers Re: Output Impedance Of Si570 (CMOS Version)
13065 2016-08-09 16:36:49 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Further searching has produced Silicon Labs AN587;

http://www.silabs.com/Support%20Documents/TechnicalDocs/AN587.pdf

 which contains this;

http://s9.postimg.org/6hiapqlyn/Si570_CMOS_Output.gif

This seems definitive; 40 ohms.  It doesn't, however, explain the 12/13 ohms measured by Dana and by AA0ZZ using what I think is a valid method.

The 'scope waveform mentioned shows about 3.2v p-p; it's not clear where this is measured, ie on the LHS or the RHS of the 10-ohm resistor.

Kerry VK2TIL.

 

13066 2016-08-09 16:41:02 kerrypwr Re: Output Impedance Of Si570 (CMOS Version)
Oh dear; I've just realised that AN587 doesn't apply to the Si570; it applies to a different "family".

Kindly ignore my previous message.

Kerry VK2TIL.
13070 2016-08-10 12:07:12 K5ESS Re: Output Impedance Of Si570 (CMOS Version)

Well here’s my 2 cents worth.  I would suspect that the CMOS output drivers of the various SI families are similar.  AN587 says:

2.1. CMOS Outputs

The CMOS output driver has an output impedance of about 40 ohms.

 

Another SI application note AN409 for another CMOS family states:

 

2. CMOS

Complementary metal-oxide semiconductor (CMOS) totem pole output buffers are used to drive capacitive loads to

CMOS logic levels. The Si500 CMOS driver output impedance is a nominal 36 ohms

 

From the Si570 datasheet VOH min = .8 VDD  to VOH max = VDD  and VOL = .4

Then it would seem that a typical device would output a waveform with a peak to peak voltage of around    .9*VDD  - .4  or 2.97-0.4 = 2.57 V P-P or 1.285 V Peak

The data sheet also gives an IOH and IOL of 32 mA.

1.285/.032 = 40.156 ohms

 

I don’t know how to reconcile this with the measured values.

 

Mike K5ESS

 

13071 2016-08-10 12:28:16 Dana Myers Re: Output Impedance Of Si570 (CMOS Version)
13072 2016-08-11 04:58:24 swift_glen Re: Output Impedance Of Si570 (CMOS Version)
A fundamental  problem here is that linear models are being used to describe a CMOS output stage that is so over-driven as to operate non-linearly. The same problem exists when dealing with a Class C,D,E,F power amp.
Linear models just don't apply. Talking about "output Z" is forbidden.
The two MOSfets of the totem-pole output (N-channel & P-channel) only operate quasi-linearly for a brief instant as they switch states, from high-to-low or low-to-high.A CMOS oscillator operates quasi-linearly initially during its initial amplitude build-up after power is applied. Later, it becomes more like a logic gate operating non-linearly.
In a logic high state, only the PMOSfet is "ON", and is strongly saturated. Its Rds parameter is most important, and is defined by its size and geometry mostly. This would be the 12-ohm figure that Dana has measured. In logic low state, the PMOS is cut off, and the NMOS is strongly driven on. It has a similar Rds. For HCMOS family, these Rds numbers are in the 40 ohm ballpark.
When biased half-way between Vdd and ground, both NMOS & PMOS are partly on. For low-amplitude input waveforms, output is quasi-linear, and the linear models can be applied. The output Z in this condition is far higher than the saturated non-linear state (above). But now the linear model is Vdd-dependent. At low Vdd, output Z can be 100X Rds. At higher Vdd, output Z is more like 10X Rds. Running CMOS gates this way is quite dangerous, where shoot-thru current generates much heat. For input waveforms of larger amplitude, output signals saturate and go non-linear - you must abandon terms like "output Z" at this point.


13075 2016-08-11 11:51:16 Dana Myers Re: Output Impedance Of Si570 (CMOS Version)
13078 2016-08-11 16:35:15 Bill Carver Re: Output Impedance Of Si570 (CMOS Version)
They can lay out the device areas of the complementary output devices to produce identical rise/fall times if they choose. And looking at waveforms it does look pretty symmetrical.

An attenuator between 3.3V CMOS and even just a +6 dBm LO mixer would not allow much (if any) attenuation, so the mixer LO port wouldn't see a very good 50 ohm return loss. To operate a diode mixer in the best possible environment a buffer amplifier AND attenuator would be the best way to optimize the mixer environment.

Isn't the Rds of a NMOS FET typically less than that of a PMOS FET in the same process?
I don't have the numbers in front of me, but I recall confirming that in measurement.

73,
Dana  K6JQ




13079 2016-08-12 12:00:04 peter_dl8ov Re: Output Impedance Of Si570 (CMOS Version)
1) Connect a CMOS Si570 to a scope and adjust the vertical gain until the waveform just fills the screen.

2) Add a 100 ohm variable resistor across the scope probe connection, IMPORTANT start with the control at maximum resistance.

3) Slowly lower the resistance value until the waveform is 50% P-P of the previous signal.

4) Remove the resistor and measure the resistance, this is the output impedance.

This method also works with amplifiers, oscillators and any other low voltage signal source.

Peter DL8OV
13080 2016-08-12 16:40:54 Steve Dick Re: Output Impedance Of Si570 (CMOS Version)
This is a good test approach but in reality devices may have different output impedances when driving high to low or low to high and the impedance is not necessarily linear.   Some CMOS devices are designed for symmetrical drive and have similar output impedances from either state.  Other devices often have higher output drive capability when driving high to low and lower drive and higher output impedance when driving low to high.  In that case, the termination resistor has to be a compromise between the different impedances. I would have to think about it, but I believe this test method gives you the average output impedance of the two different impedances and thereby gives a good result for practical use.
 
Steve K1RF
 
13081 2016-08-13 06:10:42 swift_glen Re: Output Impedance Of Si570 (CMOS Version)
Bill, thanks for steering back: How best to drive a DBM diode mixer's L.O. port with CMOS logic. Your proposal with linear buffer amp followed by attenuator is a safe one, but complex. I think a 3.3v Si570 likely has excess power available to drive a level 7 mixer, so one might ask, "what resistive attenuator network at Si570 output is best?"

Not easy, since CMOS is a non-linear source, driving mixer diodes that are also non-linear. One may wish to forego Mincircuits spec calling for a source delivering +7dBm to a 50 ohm load. Peak mixer diode current might be a more relevant criteria for attenuator design. Since the diodes are buried, I can only estimate their peak current. Weighed into this is the requirement of a 50 ohm source. I think a 2-resistor attenuator can yield good results.
One other thing - it is likely important that the logic supply is low-noise, and well-bypassed at all frequencies.
13082 2016-08-13 11:19:55 Bill Carver Re: Output Impedance Of Si570 (CMOS Version)
13083 2016-08-14 16:54:56 kb1gmx Re: Output Impedance Of Si570 (CMOS Version)
Actually he stressed that the port should not be reflective for lowest products.

Its assumed that means an accurate match but that's a simplification.  A port that
has reflections will return various products back to the mixers to create those 
and more. This is why filters directly on any port especially the IF port are frowned
on unless they are absorptive to any products being reflected back from the mixer itself.
The latter is because the mixer itself is a rather non-linear device!  The most notable is 
that most ports are not a good match to 50 ohms (see Minicircuits datasheets).

So DBMs and many other mixers require attention to how they are terminated.

Allison/KB1GMX

13084 2016-08-14 19:36:54 K5ESS Re: Output Impedance Of Si570 (CMOS Version)

Looking at the Mini Circuits ADE-1 mixer data sheet as an example, with an LO at +7dBm the LO VSWR is pretty flat at 2.5:1 and the IF VSWR is pretty flat at 1.7:1 to 1.8:1.  Can I assume then that the impedance of these ports  is pretty much purely resistive ?  If so, that would imply that the LO port impedance is either 20 ohms or  125 ohms and the IF port impedance is either 29 or 90 ohms.  Any guess as to which it would be?  If this is correct and you wanted to use attenuation to “match” these ports wouldn’t you want to design an asymmetric attenuator that matched the LO source on one side and the mixer port on the other rather than a 50 ohm attenuator?  Likewise with the IF port?  This would of course require an LO source that would supply sufficient power to still provide +7 dBm to the mixer after the attenuator.

Is this anywhere near correct or am I way off base.

Mike K5ESS

 

13085 2016-08-14 19:51:04 Dave Re: Output Impedance Of Si570 (CMOS Version)
Mike:
  If you look at the freq vs return loss graphs, the SWR does vary with frequency.  The mixers contain transformers likely adding a non resistive component.
  I use the ADE-2 for the UHFSDR.  It's impedances are closer to 50 ohms., but still vary.  I use the LVPECL version of the Si570 and drive the mixers differentially through  a 6dB pad and get very good results.

Dave - WB6DHW


13086 2016-08-17 05:03:10 kb1gmx Re: Output Impedance Of Si570 (CMOS Version)
Its not the transformers.  At least not as a singular item.

Its diodes, they are non linear to start with.

The ideal mixer would have perfect switches.  Diodes are cheap, reproducible but not perfect.

its important to note that DBM port impedance's are both a reflection of the other ports
and their termination and drive level.  Low drive alters the DBM impedance's by raising the 
the effective diode resistance.  So altering the drive level gives performance numbers that 
will vary from this in the data sheet. 

DBMs are well understood, less than perfect, easy to use, and anything but simple. 


Allison